Protection—The protection circuit prevents damage of the buffers in case of a short circuit  or an overvoltage condition. • Buffer

or an overvoltage condition.

•

Buffer—The buffer amplifies the analog signal to the ±10 V range and ensures the driving 

capability for the external load.

•

DAC 0 and DAC 1—The Digital to Analog Converters (DAC) convert the digital signals 

into low-level analog signals.

•

AO FIFO—The AO FIFO (first-in-first out) ensures that data is transferred to the DACs 

in a timely manner without being affected by USB latencies.

•

DAC Control—The DAC control sets the DAC data rate and the startup condition, which 

could be triggered by PFI 0 or PFI 1.

Connecting Analog Output Signals

The analog output signals are referenced to AO GND. Connect the loads between AO 0 or AO 1 

and AO GND.

Figure 12.  

Connecting the Analog Ouput Loads

Power-On State

The AO exhibits a short glitch when the device is powered on and when the NI DAQ dev ice 

exits suspend mode. After power-up, the AO is reset to 0 V.

AO Range

Load

V OUT

+

–

–

AO GND

Analog Output Channels

DAQ Device

AO 0

Channel 0

20

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ni.com

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NI USB-6001/6002/6003 User Guide

Minimizing Glitches on the Output Signal

When using a DAC to generate a waveform, you may observe glitches on the output signal. 

These glitches are normal; when a DAC switches from one voltage to another, it produces 

glitches due to released charges. The largest glitches occur when the most significant bit of the 

DAC code changes. You can build a lowpass deglitching filter to remove some of these glitches, 

depending on the frequency and nature of the output signal. Visit 

ni.com/support

 for more 

information about minimizing glitches.

Analog Output Data Generation Methods

When performing an analog output operation, you can perform software-timed or 

hardware-timed generations:

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