Rf and if digitization in Radio Receivers: Theory, Concepts, and Examples
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. As discussed previously, sampling at rates faster than 2f max provides an improvement in the SNR of the ADC. This occurs because the quantization noise, which is a fixed amount, is spread out over a greater bandwidth as f s increases beyond 2f max . This improvement in SNR due to oversampling causes the low-resolution quantizer to appear to have a much higher resolution. This apparent higher resolution can be quantified by the ENOB and is found from
ENOB =
SNR - 1.76dB 6.02dB
. (2)
This equation shows that the SNR must increase by approximately 6 dB in order for the ENOB to increase by 1 bit. As shown in (1), the sample rate f s must be increased to four times greater than 2f
in order for the SNR to increase by approximately 6 dB. Each subsequent increase of 6 dB in the SNR requires a further increase in sampling rate of four times.
Integrator 1-Bit Digital- to-Analog Converter Digital Filter & Decimator Input
Comparator (1-Bit Quantizer + −
+ −
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As seen from (1) and (2), to achieve an ENOB of 12 bits using a 1-bit quantizer, a sampling rate over 4 million times faster than 2f max is required. This obviously is not practical and shows that ΣΔ converters must use other techniques in addition to oversampling. The other key component in ΣΔ converters is the integrator that is placed before the 1-bit quantizer. This integrator functions as a low-pass filter for the desired signals occurring at or below f max and as a high-pass filter for the quantization noise in the ADC. This shapes the quantization noise (which is normally flat across the band from 0 to f
/2) so that very little of this noise occurs in the desired signal’s band (0 to f
). Most of the quantization noise is shifted to frequencies above f
. This process is called noise shaping and is shown in Figure 9. The results of this noise shaping are that the desired apparent resolution (ENOB) can be achieved with much less oversampling than is predicted by (1) and (2).
Figure 9. Noise shaping in ΣΔ ADCs. The effects of the integrator on the quantization noise of the ΣΔ converter can be seen mathematically by considering a linearized model of the ΣΔ modulator portion of the converter. The block diagram of this model is shown in Figure 10. The quantizer is modeled as a unity gain amplifier with quantization noise added. Looking at this model in the frequency domain, the output of the ΣΔ modulator Y(s) is given as = [ ] ( 1
where X(s) is the input signal, H(s) = 1/s is the transfer function of the integrator, and Q is the quantization noise. This expression can be rewritten as =
1
1
P o w er
0 f max f s f 2 f s » 2f max
Quantization Noise without Noise Shaping Quantization Noise with Noise Shaping P o w er
0 f max
f s f 2 f s » 2f max
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Figure 10. Linearized model of the ΣΔ modulator This shows that at low frequencies (s « 1) the output is primarily a function of the input signal
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