- Figure 3-33. (a)-(d) Development of checkerboarding. (e) Removal of the checkerboarding by compaction.
- Tanenbaum & Bos, Modern Operating Systems: 4th ed., Global Edition (c) 2015 Pearson Education Limited. All rights reserved.
Segmentation with Paging: MULTICS (1) - Figure 3-34. The MULTICS virtual memory. (a) The descriptor segment pointed to the page tables.
- Tanenbaum & Bos, Modern Operating Systems: 4th ed., Global Edition (c) 2015 Pearson Education Limited. All rights reserved.
Segmentation with Paging: MULTICS (2) - Figure 3-34. The MULTICS virtual memory. (b) A segment descriptor. The numbers are the field lengths.
- Tanenbaum & Bos, Modern Operating Systems: 4th ed., Global Edition (c) 2015 Pearson Education Limited. All rights reserved.
Segmentation with Paging: MULTICS (3) - Figure 3-35. A 34-bit MULTICS virtual address.
- Tanenbaum & Bos, Modern Operating Systems: 4th ed., Global Edition (c) 2015 Pearson Education Limited. All rights reserved.
Segmentation with Paging: MULTICS (4) - Figure 3-36. Conversion of a two-part MULTICS address into a main memory address.
- Tanenbaum & Bos, Modern Operating Systems: 4th ed., Global Edition (c) 2015 Pearson Education Limited. All rights reserved.
Segmentation with Paging: MULTICS (5) - Figure 3-37. A simplified version of the MULTICS TLB. The existence of two page sizes made the actual TLB more complicated.
- Tanenbaum & Bos, Modern Operating Systems: 4th ed., Global Edition (c) 2015 Pearson Education Limited. All rights reserved.
Segmentation with Paging: The Intel x86 (1) - Figure 3-38. An x86 selector.
- Tanenbaum & Bos, Modern Operating Systems: 4th ed., Global Edition (c) 2015 Pearson Education Limited. All rights reserved.
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