Rf and if digitization in Radio Receivers: Theory, Concepts, and Examples
Effects of Quantization Noise, Distortion, and Receiver Noise
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| 2.2 Effects of Quantization Noise, Distortion, and Receiver Noise
This section addresses the relationships between quantization noise, harmonic distortion, and receiver noise. The ADCs best suited to RF and IF processing that have widespread availability use uniform quantization. In uniform quantization, the voltage difference between each quantization level is the same. Other methods of quantization include logarithmic (A-law and μ- law), adaptive, and differential quantization. These methods currently are used in source coding. A discussion of these quantization techniques is given in Section 4. In uniform quantization, the analog signal cannot be represented exactly with only a finite number of discrete amplitude levels. Therefore, some error is introduced into the quantized signal. The error signal is the difference between the analog signal and the quantized signal. Statistically, the error signal is assumed to be uniformly distributed within a quantization level. Using this assumption, the mean squared quantization noise power P qn is
P qn =
q 2 12R where q is the quantization step size and R is the input resistance of the ADC [5]. In an ideal ADC, this representation of the quantization noise power is accurate to within a dB for input signals that are not correlated with the sampling clock. If the analog input into an ADC is periodic, the error signal is also periodic. This periodic error signal includes harmonics of the analog input signal and results in harmonic distortion. Furthermore, harmonics that fall above f
/2 appear in the frequency band from 0 to f s /2 due to aliasing. This harmonic distortion that occurs through the quantization process is quite undesirable in radio receiver applications; it becomes difficult if not impossible to distinguish the harmonics caused by quantization and the spurious and harmonic components of the actual input signal. Dithering is a technique that is commonly used to reduce this harmonic distortion.
9 Dithering is a method of randomizing the quantization noise by adding an additional noise signal to the input of the ADC [6]. Several types of techniques are used for dithering. Perhaps the most basic technique adds wideband thermal noise to the input of the ADC. This can be accomplished by summing the output of a noise diode with the input signal before digitization by the ADC. This also can be achieved by simply placing an amplifier before the ADC and providing enough gain to boost the receiver noise to a level that minimizes the spurious responses of the ADC. These techniques reduce the levels of the spurious responses by randomizing the quantization noise. In other words, for periodic input signals that would normally produce harmonics in the ADC output, the addition of a dithering signal spreads the energy in these harmonic components into random noise, thus reducing the amplitude of the spurious components. A disadvantage of adding wideband noise to the input of the ADC is that the SNR is degraded. The amount of degradation depends upon the amount of noise power added to the input of the ADC. Adding a noise power equal to the quantization noise power degrades the SNR by 3 dB [5]. Two techniques commonly are used to prevent degradation in the SNR while dithering. The first technique filters noise from a wideband noise source before the noise is added to the ADC input. Filtering limits the noise power to a frequency range that is outside of the receiver’s bandwidth. Hence, over the receiver’s bandwidth, the SNR is not degraded. The other technique used to prevent degradation of the SNR is called subtractive dithering (Figure 3). A pseudorandom noise (PN) code generator is used to generate the dithering signal. The digital output of the PN code generator is converted into an analog noise signal using a digital-to-analog converter. This noise signal is added to the input signal of the ADC. The digital output of the PN code generator is then subtracted from the output of the ADC, again preserving the SNR of the ADC [7]. An example of dithering, achieved by boosting the receiver system noise with an amplifier, is given in the following paragraphs.
Figure 3. Block diagram of subtractive dithering. Commercially available ADCs typically have a full scale range (FSR) of 1-20 V. The FSR of the ADC is the difference between the maximum and the minimum analog input voltages to the ADC. Dividing the FSR by the number of quantization levels 2
, where B is the number of bits of the ADC, provides the quantization step size q. For an 8-bit ADC with an FSR of 2.5 V, the Analog-to- Digital Converter Digital-to- Analog
Converter PN Code
Generator Analog
Input Digital
Output + − 10
quantization step size is 9.77 mV. To compute the quantization noise power, the effective input resistance of the ADC must be known. Components in radio receivers typically have a 50-ohm input and output impedance. The input impedance of ADCs is usually higher than this and is not well specified. Therefore, when interfacing an RF component with an ADC, as is necessary for digitization at the RF or IF, this impedance mismatch must be considered. A simple method of impedance matching is to place a 50-ohm resistive load at the input of the ADC. This forces the effective input resistance of the ADC to be close to 50 ohms. The quantization noise power then can be computed. Assuming a 50-ohm effective input resistance R to the ADC in this example, the quantization noise power equals -38 dBm. For a noise-limited receiver, the receiver noise power P rn can be computed as the thermal noise power in the given receiver bandwidth (BW) plus the receiver noise figure (NF). This is given as
= -174 dBm + 10 log 10 BW (Hz) + NF (dB) . For a receiver with a 10-MHz BW and a 6-dB NF, the receiver noise power is -98 dBm. Therefore, a gain of 60 dB is required to boost the receiver noise to the quantization noise power level. For an ADC of higher resolution, less gain would be needed since the quantization noise power would be smaller. Also, wider receiver bandwidths and higher receiver noise figures would require less gain since the receiver noise power would be larger. Nevertheless, for most practical receiver and ADC combinations, an amplifier with automatic gain control is necessary before the ADC. The automatic gain control is designed so that the receiver noise roughly equals the quantization noise power level for low-level signals and the input signal power does not exceed the ADCs FSR for high-level signals. The 2- to 30-MHz single-sideband (SSB) receiver presented in [8] shows an example of a receiver using this dithering technique. Digitization occurs at the 456-kHz IF after dual downconversion. The Collins Radio Division of Rockwell International uses this type of scheme in many of their receivers.
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